Adeia's Dr. Bongsub Lee has been invited to share groundbreaking developments in chip manufacturing technology at an upcoming international technology conference in Kyoto, Japan. His presentation at the IEEE CPMT Symposium this November will showcase new solutions that could help reshape how next-generation computer chips are made.

Why This Matters

Think about building a high-rise apartment complex. Just as each floor must align perfectly with the others for the building to be stable and functional, modern computer chips are now built in layers that must line up precisely. This technique, called hybrid bonding, is like having an invisible super-glue directly connecting different chip layers without using traditional solder connections or adhesives.

The Challenge

Here's the catch: these interconnect dimensions must be incredibly precise – we're talking about features smaller than a virus. 

Adeia's Breakthrough

Adeia has developed two key innovations to solve this problem:

1. Faster Measurement Technology

Instead of checking surfaces one tiny point at a time, Adeia's new method uses advanced optical technology (think super-sophisticated light measurements) to scan large areas simultaneously. This makes the process about 1,000 times faster than traditional methods – imagine inspecting an entire floor of that high-rise at once rather than room by room. 

2. Smart Defect Detection

We've also created an artificial intelligence system that automatically checks for problems like unwanted particles, irregular patterns, or tiny holes in the chip surfaces. It's like having a highly trained quality inspector who never gets tired and can spot problems in thousands of images per minute.

Real-World Impact

These metrology advances are particularly important now because the computer chip industry is at a turning point. For decades, making transistors smaller was the key to better performance. As we're reaching the physical limits of how small we can make these components, the industry is turning to new approaches – like stacking different types of chips together – to keep advancing technology.

This new approach is crucial for developing:

• More powerful AI systems
• Faster cloud computing services
• More efficient data centers
• Next-generation mobile devices

Looking to the Future

The semiconductor industry is moving toward what experts call "heterogeneous integration" – combining different chips and components to create more powerful and efficient systems. Think of it as building a skyscraper using concrete and steel. Still, any building material you can imagine now bonds atomically to the next improving electrical or thermal performance as needed in your home.

Adeia's new inspection methods demonstrate efficient workflows for advanced manufacturing in large-scale production. Importantly, they help ensure these complex chip packages can be produced reliably and efficiently.

The Bigger Picture

This technology isn't just about making better chips – it's about enabling the next generation of electronic devices to power our future. From smartphones to data centers, from artificial intelligence to cloud computing, these chip manufacturing inspection techniques help make tomorrow's technology possible today.

Dr. Lee will present these developments at the IEEE CPMT Symposium Japan on November 13-15, 2024, at Ritsumeikan University in Kyoto. This annual conference brings together leading experts in semiconductor packaging technology worldwide to share the latest advances in the field.

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