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July 25, 2024

A Review of 3D & Systems Summit 2024

A Review of 3D & Systems Summit 2024

Adeia’s semiconductor R&D team recently participated in the 2024 SEMI 3D & Systems Summit, held in Dresden, Germany, in mid-June. This year’s theme was "Heterogeneous Systems for the Intelligently Connected Era,” and the event brought together industry leaders to discuss the latest advancements in semiconductor technologies.

A Look at Co-Optimization

At the show, I presented a paper entitled, "Co-Optimization of Semiconductor Systems: Extending the Roadmap Beyond Physical Scaling."

Co-optimization is a holistic methodology that enhances the power efficiency, performance, and cost-effectiveness of semiconductor systems. This is achieved through the concurrent tuning of process technology, design, and system architecture, and is measured by PPAC (power, performance, area and cost metrics.

In my presentation, I explained the importance of co-optimization in addressing power consumption, which is becoming a greater challenge in scaling high-performance semiconductor systems today. By realigning and optimizing logic and memory subsystems, processing- or computation-in-memory, and advanced interconnect solutions, system designers can mitigate the challenge and extend their product roadmaps. 

We also presented more information about our semiconductor co-optimization strategies and values for advanced 3-D heterogenous systems on the exhibit floor.

Key Trends from the Show

  1. The momentum of artificial intelligence (AI) that has been propelled by generative AI for data centers is now expanding into on-device AI for PCs and smartphones. This expansion is expected to drive advances in semiconductor system architecture for consumer devices.
  1. Advanced packaging in 2.5D and 3D form factors can enable significant gains in compute performance and power efficiency. For success, emerging systems require higher-bandwidth and lower-energy interconnects, not only at the chip level, but also at the board level and beyond.
  1. The demand for immersive user experiences in electrified autonomous vehicles will drive a significant increase in in-vehicle compute capabilities. Automotive chip suppliers need to adopt semiconductor technologies that go beyond traditional automotive SOC and MCU capabilities.

Technical conferences like the SEMI 3D & Systems Summit are critical to fostering innovation and collaboration across the semiconductor industry. At Adeia, we are committed to continuing our pioneering work in semiconductor co-optimization and driving a vision for the future.

To learn more, please see our listing of technical papers from other industry conferences: https://adeia.com/research-papers

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Dr. Seung Kang

Senior Vice President of Semiconductor Strategy and Pathfinding

Dr. Seung Kang serves as Senior Vice President of Semiconductor Strategy and Pathfinding at Adeia, where he oversees strategic semiconductor programs encompassing technology, design, and system co- optimization. Prior to joining Adeia, Dr. Kang held a distinguished career at Qualcomm Technologies, Inc., where he spearheaded the Advanced Memory Program, pioneering early R&D and IP validation across the semiconductor ecosystem. His leadership also extended to the development of foundational logic IP for semiconductor nodes ranging from 7 nanometers down to 3 nanometers, supporting Qualcomm's flagship mobile, automotive, AI, and IoT products. Before his tenure at Qualcomm, Dr. Kang made significant contributions at Lucent Technologies Bell Laboratories and Lawrence Berkeley National Laboratory. He earned his B.S. and M.S. degrees from Seoul National University, Korea, and a Ph.D. from the University of California, Berkeley. Dr. Kang is a highly accomplished inventor, holding 250 U.S. patents and over 1000 patents granted globally. His research contributions are widely recognized, with over 100 published papers. He served as a Distinguished Lecturer for the IEEE Electron Device Society.